The present invention relates to a structure of a thin film transistor (TFT) and its forming process, and more particularly to a structure of a thin film transistor-liquid crystal display (TFT-LCD) and its forming process.
Nowadays, for maturely developing structures of thin film transistor-liquid crystal displays (TFT-LCD), a tri-layer structure of a TFT-LCD becomes the main steam. Compared to a back channel etch (BCE) structure of a TFT-LCD of the last generation, a tri-layer structure additionally includes a top nitride over the semiconductor layer as an etch stopper so that the etching step for defining source/drain and channel regions can be well controlled. Accordingly, the thickness of the active layer can be made to be thinner in the tri-layer structure than in the BCE structure, which is advantageous for the stability of resulting devices and the performance in mass production. However, the provision of the additional etch stopper layer needs an additional masking step, thereby making the process for forming a tri-layer structure relatively complicated.
As for the tri-layer structure of a TFT-LCD, a conventional forming process with six masking steps is illustrated as follows with reference to FIGS. 1A-1G which are cross-sectional views of intermediate structures at different stages. The conventional forming process includes steps of:
i) forming a first conductive layer (made of chromium, tungsten molybdenum, tantalum, aluminum, or copper) on an insulating substrate 10, and using a first mask and photolithography procedure to etch the first conductive layer for defining a gate electrode 11, as shown in FIG. 1A;
ii) forming a tri-layer structure (usually formed of silicon nitride layer-intrinsic amorphous silicon layer-silicon nitride layer) including a gate insulation layer 121, a semiconductor layer 122 and an etch stopper layer 123, and a photoresist layer 124 on the resulting structure of FIG. 1A, as shown in FIG. 1B.
iii) using a second mask and photolithography procedure to etch the etch stopper layer 123 for defining an etch stopper 13, as shown in FIG. 1C;
iv) using a third mask and photolithography procedure to etch the semiconductor layer 122 for defining a channel region 14, as shown in FIG. 1D;
v) forming a doped semiconductor layer (usually made of amorphous silicon) and a data and connection lines layer (usually made of a chromium/aluminum or a molybdenum/aluminum/molybdenum composite metal layers) on the resulting structure of FIG. 1D, and using a fourth mask and photolithography procedure to etch the doped semiconductor layer and the data and connection lines layer for defining a source/drain region 15 and a data and connection lines region 16, as shown in FIG. 1E;
vi) forming a passivation layer 17 (usually made of silicon nitride) on the resulting structure of FIG. 1E, and using a fifth mask and photolithography procedure to etch the passivation layer for defining tape automated bonding (TAB) openings (not shown), and a contact window 18, as shown in FIG. 1F; and
vii) forming a transparent electrode layer (usually made of indium tin oxide) on the resulting structure of FIG. 1F, and using a sixth mask and photolithography procedure to etch the transparent electrode layer for defining a pixel electrode 19, as shown in FIG. 1G.
However, the conventional process for forming the tri-layer structure of a TFT-LCD with six masking steps is too complicated.
As known, the number of mask and photolithography procedures directly affects not only the production cost but also the manufacturing time. Moreover, for each mask and photolithography procedure, the risks of mis-alignment and particulate contamination may be involved so as to affect the production yield. Therefore, the major object of the present invention is to solve the drawbacks of prior art, and further provide a forming process with reduced mask and photolithography procedures.
It is an object of the present invention to provide a process for forming a TFT-LCD with reduced mask and photolithography procedures.
It is another object of the present invention to provide a structure of a TFT-LCD with reduced mask and photolithography procedures.
In accordance with an aspect of the present invention, the process for forming a TFT-LCD includes steps of: providing an insulating substrate; forming a transparent electrode layer, a first conductive layer and a first photoresist layer on the insulating substrate; using a first mask and photolithography procedure to etch the transparent electrode layer and the first conductive layer for defining a transparent electrode and a gate electrode, and removing the first photoresist layer; forming an insulation layer, a semiconductor layer, an etch stopper layer and a second photoresist layer on the insulating substrate and the gate electrode, and using a second mask and photolithography procedure to etch the etch stopper layer and the semiconductor layer for defining an etch stopper and a channel region; forming a doped semiconductor layer and a data and connection lines layer, removing the second photoresist layer, and forming a third photoresist layer above the insulating substrate; using a third mask and photolithography procedure to etch the data and connection lines layer, the doped semiconductor layer and the insulation layer for defining a data and connection lines region, a source/drain region and a gate insulating region; forming a second conductive layer above the insulating substrate, and removing the third photoresist layer for defining a conductive region; and forming a passivation layer and a fourth photoresist layer above the insulating substrate, using a fourth mask and photolithography procedure to etch the passivation layer, the conductive region and the gate electrode for defining a passivation region and a pixel electrode, and removing the fourth photoresist layer.
Preferably, the insulating substrate is made of a light-transmitting material.
Preferably, the light-transmitting material is glass.
Preferably, the conductive layer is made of chromium, molybdenum, tantalum, tantalum molybdenum, tungsten molybdenum, aluminum, aluminum silicon, copper or the mixture thereof.
Preferably, the insulation layer is made of silicon nitride, silicon oxide, silicon oxynitride, tantalum oxide, aluminum oxide or the mixture thereof.
Preferably, the etch stopper layer is made of silicon nitride, silicon oxide or silicon oxynitride.
Preferably, the semiconductor layer is made of intrinsic amorphous silicon, micro-crystalline silicon or polysilicon.
Preferably, the doped semiconductor layer is made of highly doped amorphous silicon, highly doped micro-crystalline silicon or highly doped polysilicon.
Preferably, the transparent electrode layer is made of indium tin oxide or indium lead oxide.
Preferably, the data and connection lines layer is made of a chromium/aluminum or a molybdenum/aluminum/molybdenum composite metal layers.
Preferably, the passivation layer is made of silicon nitride or silicon oxynitride.
According to the process for forming a TFT-LCD described above, a process for forming a storage capacitor is performed simultaneously, which includes steps of: using the first mask and photolithography procedure to etch the transparent electrode layer and the first conductive layer for defining a lower electrode of the storage capacitor; using the third mask and photolithography procedure to etch the data and connection lines layer, the doped semiconductor layer and the insulation layer for defining an upper electrode and an insulating region of the storage capacitor; and using the fourth mask and photolithography procedure to etch the passivation layer, the conductive region and the gate electrode for defining a passivation region of the storage capacitor.
Preferably, the storage capacitor is made of metal-insulator-metal or metal-insulator-silicon.
According to the process for forming a TFT-LCD described above, a process for forming a wiring pad is performed simultaneously, which includes steps of: using said first mask and photolithography procedure to etch said transparent electrode layer and said first conductive layer for defining a first configuration of said wiring pad; using said third mask and photolithography procedure to etch said data and connection lines layer, said doped semiconductor layer and said insulation layer for defining a second configuration of said wiring pad; and using said fourth mask and photolithography procedure to etch said passivation layer, said conductive region and said gate electrode for defining a passivation region and an opening of said-wiring pad.
According to the process for forming a TFT-LCD described above, a process for forming an electrostatic discharge structure is performed simultaneously, which includes steps of: using said first mask and photolithography procedure to etch said transparent electrode layer and said first conductive layer for defining a third configuration of said electrostatic discharge structure; using said third mask and photolithography procedure to etch said data and connection lines layer, said doped semiconductor layer and said insulation layer for defining a fourth configuration of said electrostatic discharge structure; and using said fourth mask and photolithography procedure to etch said passivation layer, said conductive region and said gate electrode for defining a passivation region of said electrostatic discharge structure.
In accordance with another aspect of the present invention, a structure of a TFT-LCD includes an insulating substrate, a transparent electrode, a pixel electrode, a gate electrode, a gate insulating electrode region, a channel region, an etch stopper, a source/drain region, a data and connection lines region, a conductive region and a passivation region. The transparent electrode and the pixel electrode are formed on the insulating substrate. The gate electrode is formed on the transparent electrode. The gate insulating region is formed on the insulating substrate and the gate electrode, and covers a portion of the pixel electrode. The channel region is formed on the gate insulating region and is conforming to position and size of the gate electrode. The etch stopper is formed on the channel region. The source/drain region is formed on both sides of the channel region and the etch stopper, and on the gate insulating region which is not covered by the channel region and the etch stopper. The data and connection lines region is formed on the gate insulating region with the source/drain region. The conductive region is formed on both sides of the data and connection lines region, the source/drain region and the gate insulating region. The passivation region is formed on the etch stopper, the data and connection lines region and the conductive region.
Preferably, the insulating substrate is made of a light-transmitting material.
Preferably, the light-transmitting material is glass.
Preferably, the conductive layer is made of chromium, molybdenum, tantalum, tantalum molybdenum, tungsten molybdenum, aluminum, aluminum silicon, copper or the mixture thereof.
Preferably, the insulation layer is made of silicon nitride, silicon oxide, silicon oxynitride, tantalum oxide, aluminum oxide or the mixture thereof.
Preferably, the etch stopper layer is made of silicon nitride, silicon oxide or silicon oxynitride.
Preferably, the semiconductor layer is made of intrinsic amorphous silicon, micro-crystalline silicon or polysilicon.
Preferably, the doped semiconductor layer is made of highly doped amorphous silicon, highly doped micro-crystalline silicon or highly doped polysilicon.
Preferably, the transparent electrode layer is made of indium tin oxide or indium lead oxide.
Preferably, the data and connection lines layer is made of a chromium/aluminum or a molybdenum/aluminum/molybdenum composite metal layers.
Preferably, the passivation layer is made of silicon nitride or silicon oxynitride.
The above objects and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed descriptions and accompanying drawings, in which: